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STAGE 2

Below is the EEPROM hardware sub-system soldered onto veroboard.

Below is the Capasitive Touch sub-system being Tested on a protoboard.

Below is the general idea for our chassis

Team secret
Team secret

Below is the Capasitive Touch sub-system being Tested on a protoboard.

Soldering the 7-segment's driver onto the newly designed vero-board

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